Cache-Oblivious Searching and Sorting
Benchmark Results
Key to interpret the plots of this directory:
- po = searching with layout-policy implementation
- pu = searching with pure-c implementation
- sort = sorting
- all = measurements of funnelsort, introsort, and 4-way mergesort
- d = measurements of funnelsort for different values of d
- si = successful lookups of elements of increasing value
- sr = successful lookups of random elements
- src = successful lookups of random elements in a repetitive cycle
- u = unsuccessful lookups
- CPU = CPU time measurements
- WALL = Wall-clock time measurements
- BRCN = Conditional-branch instruction counts
- BRMSP = Branch misprediction counts
- L1A = Level 1 cache access counts
- L1M = Level 1 cache miss counts
- L2M = Level 2 cache miss counts
- PAGEFAULTS = Page fault counts
plot-po-si-BRCN-athlon.pdf
plot-po-si-BRCN-athlon.ps
plot-po-si-BRMSP-athlon.pdf
plot-po-si-BRMSP-athlon.ps
plot-po-si-CPU-athlon.pdf
plot-po-si-CPU-athlon.ps
plot-po-si-L1A-athlon.pdf
plot-po-si-L1A-athlon.ps
plot-po-si-L1M-athlon.pdf
plot-po-si-L1M-athlon.ps
plot-po-si-L2M-athlon.pdf
plot-po-si-L2M-athlon.ps
plot-po-si-PAGEFAULTS-pentium.pdf
plot-po-si-PAGEFAULTS-pentium.ps
plot-po-si-WALL-pentium.pdf
plot-po-si-WALL-pentium.ps
plot-po-sr-BRCN-athlon.pdf
plot-po-sr-BRCN-athlon.ps
plot-po-sr-BRMSP-athlon.pdf
plot-po-sr-BRMSP-athlon.ps
plot-po-sr-CPU-athlon.pdf
plot-po-sr-CPU-athlon.ps
plot-po-sr-L1A-athlon.pdf
plot-po-sr-L1A-athlon.ps
plot-po-sr-L1M-athlon.pdf
plot-po-sr-L1M-athlon.ps
plot-po-sr-L2M-athlon.pdf
plot-po-sr-L2M-athlon.ps
plot-po-sr-PAGEFAULTS-pentium.pdf
plot-po-sr-PAGEFAULTS-pentium.ps
plot-po-sr-WALL-pentium.pdf
plot-po-sr-WALL-pentium.ps
plot-po-src-BRCN-athlon.pdf
plot-po-src-BRCN-athlon.ps
plot-po-src-BRMSP-athlon.pdf
plot-po-src-BRMSP-athlon.ps
plot-po-src-CPU-athlon.pdf
plot-po-src-CPU-athlon.ps
plot-po-src-L1A-athlon.pdf
plot-po-src-L1A-athlon.ps
plot-po-src-L1M-athlon.pdf
plot-po-src-L1M-athlon.ps
plot-po-src-L2M-athlon.pdf
plot-po-src-L2M-athlon.ps
plot-po-src-PAGEFAULTS-pentium.pdf
plot-po-src-PAGEFAULTS-pentium.ps
plot-po-src-WALL-pentium.pdf
plot-po-src-WALL-pentium.ps
plot-po-u-CPU-athlon.pdf
plot-po-u-CPU-athlon.ps
plot-po-u-L1A-athlon.pdf
plot-po-u-L1A-athlon.ps
plot-po-u-L1M-athlon.pdf
plot-po-u-L1M-athlon.ps
plot-po-u-L2M-athlon.pdf
plot-po-u-L2M-athlon.ps
plot-pu-si-CPU-athlon.pdf
plot-pu-si-CPU-athlon.ps
plot-pu-si-INS-athlon.pdf
plot-pu-si-INS-athlon.ps
plot-pu-sr-CPU-athlon.pdf
plot-pu-sr-CPU-athlon.ps
plot-pu-sr-INS-athlon.pdf
plot-pu-sr-INS-athlon.ps
plot-pu-src-CPU-athlon.pdf
plot-pu-src-CPU-athlon.ps
plot-pu-src-INS-athlon.pdf
plot-pu-src-INS-athlon.ps"
plot-pu-u-CPU-athlon.pdf
plot-pu-u-CPU-athlon.ps
plot-pu-u-INS-athlon.pdf
plot-pu-u-INS-athlon.ps
plot-sort-all-BRCN-athlon.pdf
plot-sort-all-BRCN-athlon.ps
plot-sort-all-BRMSP-athlon.pdf
plot-sort-all-BRMSP-athlon.ps
plot-sort-all-CPU-athlon.pdf
plot-sort-all-CPU-athlon.ps
plot-sort-all-INS-athlon.pdf
plot-sort-all-INS-athlon.ps
plot-sort-all-L1A-athlon.pdf
plot-sort-all-L1A-athlon.ps
plot-sort-all-L1M-athlon.pdf
plot-sort-all-L1M-athlon.ps
plot-sort-all-L2M-athlon.pdf
plot-sort-all-L2M-athlon.ps
plot-sort-all-PAGEFAULTS-pentium.pdf
plot-sort-all-PAGEFAULTS-pentium.ps
plot-sort-all-WALL-pentium.pdf
plot-sort-all-WALL-pentium.ps
plot-sort-d-BRCN-athlon.pdf
plot-sort-d-BRCN-athlon.ps
plot-sort-d-BRMSP-athlon.pdf
plot-sort-d-BRMSP-athlon.ps
plot-sort-d-CPU-athlon.pdf
plot-sort-d-CPU-athlon.ps
plot-sort-d-INS-athlon.pdf
plot-sort-d-INS-athlon.ps
plot-sort-d-L1A-athlon.pdf
plot-sort-d-L1A-athlon.ps
plot-sort-d-L1M-athlon.pdf
plot-sort-d-L1M-athlon.ps
plot-sort-d-L2M-athlon.pdf
plot-sort-d-L2M-athlon.ps
plot-sort-d-PAGEFAULTS-pentium.pdf
plot-sort-d-PAGEFAULTS-pentium.ps
plot-sort-d-WALL-pentium.pdf
plot-sort-d-WALL-pentium.ps
plot-sr-lower-bound-athlon.pdf
plot-sr-lower-bound-athlon.ps